Prazo de entrega: 2 semanas.
Se você possui dúvidas sobre o livro em nosso site, como por exemplo outros formatos de encadernação, disponibilidade, prazos de entrega, outras formas de envio e pagamentos ou não deseja fazer o pedido via website, entre em contato com nosso Serviço de Apoio ao Cliente.
Series: The Morgan Kaufmann Series in Computer Architecture and DesignPaperback: 856 pages
Publisher: Morgan Kaufmann; 5 edition (September, 2011)
Product Dimensions: 9.1 x 7.5 x 1.8 inches
Shipping Weight: 3.8 pounds
- Part of Intel's 2012 Recommended Reading List for Developers
- Updated to cover the mobile computing revolution
- Emphasizes the two most important topics in architecture today: memory hierarchy and parallelism in all its forms.
- Develops common themes throughout each chapter: power, performance, cost, dependability, protection, programming models, and emerging trends ("What's Next")
- Includes three review appendices in the printed text. Additional reference appendices are available online.
- Includes updated Case Studies and completely new exercises.
Computer Architecture: A Quantitative Approach explores the ways that software and technology in the cloud are accessed by digital media, such as cell phones, computers, tablets, and other mobile devices. The book became a part of Intel's 2012 recommended reading list for developers, and it covers the revolution of mobile computing. The text also highlights the two most important factors in architecture today: parallelism and memory hierarchy. The six chapters that this book is composed of follow a consistent framework: explanation of the ideas in each chapter; a "crosscutting issues" section, which presents how the concepts covered in one chapter connect with those given in other chapters; a "putting it all together" section that links these concepts by discussing how they are applied in real machine; and detailed examples of misunderstandings and architectural traps commonly encountered by developers and architects. The first chapter of the book includes formulas for energy, static and dynamic power, integrated circuit costs, reliability, and availability. Chapter 2 discusses memory hierarchy and includes discussions about virtual machines, SRAM and DRAM technologies, and new material on Flash memory. The third chapter covers the exploitation of instruction-level parallelism in high-performance processors, superscalar execution, dynamic scheduling and multithreading, followed by an introduction to vector architectures in the fourth chapter. Chapters 5 and 6 describe multicore processors and warehouse-scale computers (WSCs), respectively. This book is an important reference for computer architects, programmers, application developers, compiler and system software developers, computer system designers and application developers.
Computer Architects, Computer System Designers, Compiler and System Software Developers, Programmers, Application Developers
Table of Contents
Computer Architecture, 5th Edition
Chap 1: Fundamentals of Quantitative Design and Analysis
Chap 2: Memory Hierarchy Design
Chap 3: Instruction-Level Parallelism and Its Exploitation
Chap 4: Data-Level Parallelism in Vector, SIMD, and GPU Architectures
Chap 5: Multiprocessors and Thread-Level Parallelism
Chap 6: The Warehouse-Scale Computer
App A: Instruction Set Principles
App B: Review of Memory Hierarchy
App C: Pipelining: Basic and Intermediate Concepts
App D: Storage Systems
App E: Embedded Systems
App F: Interconnection Networks
App G: Vector Processors
App H: Hardware and Software for VLIW and EPIC
App I: Large-Scale Multiprocessors and Scientific Applications
App J: Computer Arithmetic
App K: Survey of Instruction Set Architectures